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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-11 12:07:29 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-11 12:07:29 +0100 |
| commit | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (patch) | |
| tree | 5d864537d44177d855b5af77934e860b0d484ec5 /target-arm/cpu.h | |
| parent | 7b9c09f7d486647784c605739d69b708a7249c9b (diff) | |
| parent | af5b83d7d5297f8bdfd3353a420c120c4fd5adfd (diff) | |
Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-09-11' into staging
trivial patches for 2015-09-11
# gpg: Signature made Fri 11 Sep 2015 12:02:43 BST using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"
* remotes/mjt/tags/pull-trivial-patches-2015-09-11: (26 commits)
virtio-vga: enable for i386
hw/arm/spitz: Remove meaningless blank Property
hw/gpio/zaurus: Remove meaningless blank Property
hw/virtio/virtio-pci: Remove meaningless blank Property
hw/s390x/s390-virtio-bus: Remove meaningless blank Property
typofixes - v4
qapi-schema: remove legacy<> from doc
disas/microblaze: Remove unused code
help: dd missing newline
Target-ppc: Remove unnecessary variable
baum: Fix build with debugging enabled
linux-user: Fix warnings caused by missing 'static' attribute
opts: produce valid command line in qemu_opts_print
docs: fix a qga/qapi-schema.json comment
trivial: remove trailing newline from error_report
maint: avoid useless "if (foo) free(foo)" pattern
maint: avoid useless "if (foo) free(foo)" pattern
maint: remove unused include for strings.h
maint: remove unused include for signal.h
maint: remove unused include for dirent.h
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 4bd5dc875c..5abd8ba5c5 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -173,7 +173,7 @@ typedef struct CPUARMState { uint32_t GE; /* cpsr[19:16] */ uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */ uint32_t condexec_bits; /* IT bits. cpsr[15:10,26:25]. */ - uint64_t daif; /* exception masks, in the bits they are in in PSTATE */ + uint64_t daif; /* exception masks, in the bits they are in PSTATE */ uint64_t elr_el[4]; /* AArch64 exception link regs */ uint64_t sp_el[4]; /* AArch64 banked stack pointers */ @@ -224,8 +224,8 @@ typedef struct CPUARMState { }; /* MMU translation table base control. */ TCR tcr_el[4]; - uint32_t c2_data; /* MPU data cachable bits. */ - uint32_t c2_insn; /* MPU instruction cachable bits. */ + uint32_t c2_data; /* MPU data cacheable bits. */ + uint32_t c2_insn; /* MPU instruction cacheable bits. */ union { /* MMU domain access control register * MPU write buffer control. */ @@ -1488,7 +1488,7 @@ bool write_list_to_cpustate(ARMCPU *cpu); */ bool write_cpustate_to_list(ARMCPU *cpu); -/* Does the core conform to the the "MicroController" profile. e.g. Cortex-M3. +/* Does the core conform to the "MicroController" profile. e.g. Cortex-M3. Note the M in older cores (eg. ARM7TDMI) stands for Multiply. These are conventional cores (ie. Application or Realtime profile). */ |