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author | Peter Maydell <peter.maydell@linaro.org> | 2015-08-25 15:45:08 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-08-25 15:45:08 +0100 |
commit | 2a47df953202e1f226aa045ea974427c4540a167 (patch) | |
tree | e36df504d10ac85ad64526cae8e7ecdeb22d46dc /target-arm/cpu.h | |
parent | d0a2cbceb2aa20d64d53e1c20c7d26a78ade8382 (diff) |
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
Wire up the AArch64 EL2 and EL3 address translation operations
(AT S12E1*, AT S12E0*, AT S1E2*, AT S1E3*), and correct some
errors in the ats_write64() function in previously unused code
that would have done the wrong kind of lookup for accesses from
EL3 when SCR.NS==0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1437751263-21913-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/cpu.h')
0 files changed, 0 insertions, 0 deletions