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authorPeter Maydell <peter.maydell@linaro.org>2014-04-15 19:18:43 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-04-17 21:34:04 +0100
commita65f1de982302f5c33f668ad25a120eba7993d37 (patch)
tree68af19a05242c14ebb938b889a9f5be3728fdb94 /target-arm/cpu.h
parentf502cfc207ff288ec1f3dac10024c51ffe64a65d (diff)
target-arm: Implement AArch64 SPSR_EL1
Implement the AArch64 SPSR_EL1. For compatibility with how KVM handles SPSRs and with the architectural mapping between AArch32 and AArch64, we put this in the banked_spsr[] array in the slot that is used for SVC in AArch32. This means we need to extend the array from uint32_t to uint64_t, which requires some reworking of the 32 bit KVM save/restore code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 28b9bda218..0ce4c26d16 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -143,7 +143,7 @@ typedef struct CPUARMState {
uint32_t spsr;
/* Banked registers. */
- uint32_t banked_spsr[6];
+ uint64_t banked_spsr[6];
uint32_t banked_r13[6];
uint32_t banked_r14[6];