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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2015-08-13 11:26:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:17 +0100
commitedac4d8a168b9c0c4a765bbc5507e46fa5557b78 (patch)
tree929b26d8fd74266d4224c9701ee7e749471784c9 /target-arm/cpu.h
parentca0e5d8b0d065a95d0f9042f71b2ace45b015596 (diff)
target-arm: Add CNTVOFF_EL2
Adds support for the virtual timer offset controlled by EL2. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1436791864-4582-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 7e89152bde..b1fa2879a8 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -358,6 +358,7 @@ typedef struct CPUARMState {
};
uint64_t c14_cntfrq; /* Counter Frequency register */
uint64_t c14_cntkctl; /* Timer Control register */
+ uint64_t cntvoff_el2; /* Counter Virtual Offset register */
ARMGenericTimer c14_timer[NUM_GTIMERS];
uint32_t c15_cpar; /* XScale Coprocessor Access Register */
uint32_t c15_ticonfig; /* TI925T configuration byte. */