diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 11:57:19 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 12:10:05 +0000 |
commit | 776d4e5c6ca47f8d7b73c9c8eccf20209bf57529 (patch) | |
tree | 7c39aaebe726666ab182cb9c0d27aaef7c5bb5c3 /target-arm/cpu.h | |
parent | 8515a092948584ce112b90030edcef344c6a0f90 (diff) |
target-arm: Convert cp15 cache ID registers
Convert the cp15 cache ID registers to the new scheme.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 095354304a..0b984d8495 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -108,8 +108,6 @@ typedef struct CPUARMState { struct { uint32_t c0_cpuid; uint32_t c0_cachetype; - uint32_t c0_ccsid[16]; /* Cache size. */ - uint32_t c0_clid; /* Cache level. */ uint32_t c0_cssel; /* Cache size selection. */ uint32_t c1_sys; /* System control register. */ uint32_t c1_coproc; /* Coprocessor access register. */ |