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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-09-29 18:48:49 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-09-29 18:48:49 +0100
commit043b7f8d12dc922172cf7d570dc2854dbf81dcb3 (patch)
tree1565f450a12dd17d0a097a3bb6760c8c180e4c3b /target-arm/cpu.h
parent9e729b57ac2a3adebee2746a2106a70eb8230a72 (diff)
target-arm: Break out exception masking to a separate func
Reviewed-by: Greg Bellows <greg.bellows@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1411718914-6608-5-git-send-email-edgar.iglesias@gmail.com [PMM: updated to account for recent cpu-exec refactoring] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index a3ba624b74..cc2c2100b3 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1172,6 +1172,21 @@ bool write_cpustate_to_list(ARMCPU *cpu);
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)
+{
+ CPUARMState *env = cs->env_ptr;
+
+ switch (excp_idx) {
+ case EXCP_FIQ:
+ return !(env->daif & PSTATE_F);
+ case EXCP_IRQ:
+ return !(env->daif & PSTATE_I)
+ && (!IS_M(env) || env->regs[15] < 0xfffffff0);
+ default:
+ g_assert_not_reached();
+ }
+}
+
static inline CPUARMState *cpu_init(const char *cpu_model)
{
ARMCPU *cpu = cpu_arm_init(cpu_model);