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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-09-12 14:06:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-12 14:06:50 +0100 |
| commit | 0be969a2d974971628fc4ed95834d22ecf0fd497 (patch) | |
| tree | 77419247280f44147ba1a3b3627f0883fd18c226 /target-arm/cpu-qom.h | |
| parent | fa439fc5d7f9094eab4158a906b0e1498504c9cf (diff) | |
hw/arm/virt: fix pl011 and pl031 irq flags
The pl011 and pl031 devices both use level triggered interrupts,
but the device tree we construct was incorrectly telling the
kernel to configure the GIC to treat them as edge triggered.
This meant that output from the pl011 would hang after a while.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1410274423-9461-1-git-send-email-peter.maydell@linaro.org
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Cc: qemu-stable@nongnu.org
Diffstat (limited to 'target-arm/cpu-qom.h')
0 files changed, 0 insertions, 0 deletions