diff options
| author | Richard Henderson <rth@twiddle.net> | 2009-12-11 13:21:02 -0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2009-12-13 21:36:21 +0100 |
| commit | a06d48d91f1613878d0d3c57980451aac15e3f75 (patch) | |
| tree | 6bdc0aa71674685049706310c7d0d54db402c06c /target-alpha/translate.c | |
| parent | 50eb6e5c04de14a5fb0dd99f99e165e1cb839460 (diff) | |
target-alpha: Fix FMOV.
Properly handle move from the zero register.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-alpha/translate.c')
| -rw-r--r-- | target-alpha/translate.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 1c809b7611..8a9aeb744f 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -1834,12 +1834,16 @@ static inline int translate_one(DisasContext *ctx, uint32_t insn) break; case 0x020: if (likely(rc != 31)) { - if (ra == rb) + if (ra == rb) { /* FMOV */ - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); - else + if (ra == 31) + tcg_gen_movi_i64(cpu_fir[rc], 0); + else + tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); + } else { /* CPYS */ gen_fcpys(ra, rb, rc); + } } break; case 0x021: |