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authorRichard Henderson <rth@twiddle.net>2011-05-23 12:12:29 -0700
committerRichard Henderson <rth@anchor.twiddle.net>2011-05-31 10:18:05 -0700
commit26b46094478a347e65d3b1cbdb60f069d259a965 (patch)
tree50206e3753cc67967e14dcbce2efb470fb2a69fe /target-alpha/cpu.h
parentbba9bdcee8d4acc4e5f243f40d015a5a30493faa (diff)
target-alpha: Add IPRs to be used by the emulation PALcode.
These aren't actually used yet, but we can at least access them via the HW_MFPR and HW_MTPR instructions. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha/cpu.h')
-rw-r--r--target-alpha/cpu.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index a59b39a6da..d1ef04d1b5 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -244,6 +244,9 @@ struct CPUAlphaState {
uint8_t ps;
uint8_t intr_flag;
uint8_t pal_mode;
+ uint8_t fen;
+
+ uint32_t pcc_ofs;
/* These pass data from the exception logic in the translator and
helpers to the OS entry point. This is used for both system
@@ -252,6 +255,18 @@ struct CPUAlphaState {
uint64_t trap_arg1;
uint64_t trap_arg2;
+#if !defined(CONFIG_USER_ONLY)
+ /* The internal data required by our emulation of the Unix PALcode. */
+ uint64_t exc_addr;
+ uint64_t palbr;
+ uint64_t ptbr;
+ uint64_t vptptr;
+ uint64_t sysval;
+ uint64_t usp;
+ uint64_t shadow[8];
+ uint64_t scratch[24];
+#endif
+
#if TARGET_LONG_BITS > HOST_LONG_BITS
/* temporary fixed-point registers
* used to emulate 64 bits target on 32 bits hosts