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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-06-07 12:50:20 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2016-06-07 13:10:44 +1000
commitf5d9c1089f0136c2aadf51389e93a94d517e430f (patch)
treee02853c336e945c908734c105154f0a64e5f574c /stubs/cpu-get-clock.c
parent88655881335d3c842020418fdec7f04ecb3a50ae (diff)
ppc: Properly tag the translation cache based on MMU mode
We used to always flush the TLB when changing relocation mode in MSR:IR and MSR:DR (ie. MMU on/off for Instructions and Data). We don't anymore since we have split mmu_idx for instruction and data. However, since we hard code the mmu_idx in the translated code, we now need to also make sure MSR:IR and MSR:DR are part of the hflags used to tag translated code, so that we use different translated code for different MMU settings. Darwin gets hurt by this problem. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'stubs/cpu-get-clock.c')
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