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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2018-01-27 17:43:21 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2018-02-13 11:44:13 +0100
commit733210e75465aecf99cac641e6408cee6ace9037 (patch)
tree55124ca885a2352949df31a5fefc93953bbefa44 /scripts/analyse-locks-simpletrace.py
parentea15ea8a7c67b1277d6817fb247b1427e0d293f3 (diff)
hw/net/can: SJA1000 chip register level emulation for QEMU
The core SJA1000 support is independent of following patches which map SJA1000 chip to PCI boards. The work is based on Jin Yang GSoC 2013 work funded by Google and mentored in frame of RTEMS project GSoC slot donated to QEMU. Rewritten for QEMU-2.0+ versions and architecture cleanup by Pavel Pisa (Czech Technical University in Prague). Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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