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authorLeon Alrae <leon.alrae@imgtec.com>2014-07-07 11:23:58 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2014-11-03 11:48:34 +0000
commit2fb58b73746e2f99ac85e82160277b18b18279be (patch)
treecedded3812b8bd8cf5718c655420673c3a6b6ba7 /rules.mak
parent9f6bcedba61927438000fb94b0706c22dfb87eaa (diff)
target-mips: add RI and XI fields to TLB entry
In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
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