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authorFabien Chouteau <chouteau@adacore.com>2011-09-28 05:54:05 +0000
committerAlexander Graf <agraf@suse.de>2011-10-30 17:11:53 +0100
commit70560da79d5be611bd7867f9c590847702c61fb5 (patch)
tree123a12ea9536942c0954bf172f258e58c6778a1b /qfloat.c
parentbdcf9d6cd4ff987e58ba4f311ba7b1a33cf3ce5e (diff)
Set an invalid-bits mask for each SPE instructions
SPE instructions are defined by pairs. Currently, the invalid-bits mask is set for the first instruction, but the second one can have a different mask. example: GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE), Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'qfloat.c')
0 files changed, 0 insertions, 0 deletions