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authorPeter Maydell <peter.maydell@linaro.org>2011-11-09 20:46:35 +0000
committerAnthony Liguori <aliguori@us.ibm.com>2011-11-11 12:49:53 -0600
commitafd4a65225318ec7900871ed69a46ce992637ef2 (patch)
tree0a135bc7bd5afc63ca2c0cbce46ab87b38ae60d6 /qemu.sasl
parentb78c2b3aad2b42084265c89f93a92733d68e9003 (diff)
hw/pxa2xx.c: Fix handling of R/WC bits in PMCR
Fix a bug in handling the write-one-to-clear bits in the PMCR which meant that we would always clear the bit even if the value written was a zero. Spotted by Coverity (see bug 887883). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'qemu.sasl')
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