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| author | Tom Musta <tommusta@gmail.com> | 2014-11-12 15:46:01 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-01-07 16:16:25 +0100 |
| commit | 14ba79c73a1c2db78becef171ec2f73606c1d7e1 (patch) | |
| tree | 8d61531b379d053f9f9c462e68d0f02abe5b52e3 /qemu.sasl | |
| parent | 4814f2d116c057d6fdfd57f3b979c77d5668e878 (diff) | |
target-ppc: mffs. Should Set CR1 from FPSCR Bits
Update the Move From FPSCR (mffs.) instruction to correctly
set CR[1] from FPSCR[FX,FEX,VX,OX].
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'qemu.sasl')
0 files changed, 0 insertions, 0 deletions