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author | Peter Maydell <peter.maydell@linaro.org> | 2017-11-20 18:08:28 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-11-21 12:09:25 +0000 |
commit | 34d49937e480edfa173d71e8c17972ad866b56c6 (patch) | |
tree | d2080bc4d17a444d90a3b95a82ce0324e2898122 /qemu.nsi | |
parent | 27266271977c5a30f2f7d493e042be1897827bdd (diff) |
accel/tcg: Handle atomic accesses to notdirty memory correctly
To do a write to memory that is marked as notdirty, we need
to invalidate any TBs we have cached for that memory, and
update the cpu physical memory dirty flags for VGA and migration.
The slowpath code in notdirty_mem_write() does all this correctly,
but the new atomic handling code in atomic_mmu_lookup() doesn't
do anything at all, it just clears the dirty bit in the TLB.
The effect of this bug is that if the first write to a notdirty
page for which we have cached TBs is by a guest atomic access,
we fail to invalidate the TBs and subsequently will execute
incorrect code. This can be seen by trying to run 'javac' on AArch64.
Use the new notdirty_call_before() and notdirty_call_after()
functions to correctly handle the update to notdirty memory
in the atomic codepath.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1511201308-23580-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'qemu.nsi')
0 files changed, 0 insertions, 0 deletions