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authorPeter Maydell <peter.maydell@linaro.org>2018-03-13 15:34:58 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-19 18:23:24 +0000
commitff72cb6b46b95bb530787add5277c211af3d31c6 (patch)
tree092ec87be2c37ebc77edf4c5cb59751c78c3839f /qemu.nsi
parent210f47840dd62dcdb6ee87b2c6062f322f7e0363 (diff)
hw/arm/raspi: Provide spin-loop code for AArch64 CPUs
The raspi3 has AArch64 CPUs, which means that our smpboot code for keeping the secondary CPUs in a pen needs to have a version for A64 as well as A32. Without this, the secondary CPUs go into an infinite loop of taking undefined instruction exceptions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180313153458.26822-10-peter.maydell@linaro.org
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