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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2015-09-14 14:39:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-09-14 14:39:50 +0100
commit1edee4708a0e3163cbf20fac325be456abd960bb (patch)
treed91bdd28706049733900af0f7586e179a03d4466 /qemu.nsi
parentb698e9cfd282b228b36d426b75facb83e07a1072 (diff)
target-arm: Suppress TBI for S2 translations
Stage-2 MMU translations do not have configurable TBI as the top byte is always 0 (48-bit IPAs). Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1442135278-25281-5-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'qemu.nsi')
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