diff options
| author | Alexander Graf <agraf@suse.de> | 2013-12-17 19:42:34 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 20:12:51 +0000 |
| commit | 6c1adc919b6a81e008b919c53902b4877ef4d737 (patch) | |
| tree | edb74edb6dc56584905e243cd18dd773eadf23a8 /qemu-timer.c | |
| parent | 8220e911c240df5b4b2a1473f0ba9feddc154c45 (diff) | |
target-arm: A64: add support for 2-src shift reg insns
This adds 2-src variable shift register instructions:
C5.6.115 LSLV, C5.6.118 LSRV, C5.6.17 ASRV, C5.6.154 RORV
Signed-off-by: Alexander Graf <agraf@suse.de>
[claudio: adapted to new decoder, use enums for shift types]
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'qemu-timer.c')
0 files changed, 0 insertions, 0 deletions