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authorRichard Henderson <richard.henderson@linaro.org>2018-05-22 19:51:00 -0700
committerStafford Horne <shorne@gmail.com>2018-07-03 00:05:28 +0900
commitb9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056 (patch)
tree15dba503a0704eca2b64bf8b77e7621bcd3208b5 /qemu-tech.texi
parentfffde6695f4be3cf484f068f24e894280d7360ea (diff)
target/openrisc: Fix cpu_mmu_index
The code in cpu_mmu_index does not properly honor SR_DME. This bug has workarounds elsewhere in that we flush the tlb more often than necessary, on the state changes that should be reflected in a change of mmu_index. Fixing this means that we can respect the mmu_index that is given to tlb_flush. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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