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| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-04 14:43:45 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-04 14:43:45 +0000 |
| commit | 1d54269590484a7b87c6d342ef6d2e8333a62674 (patch) | |
| tree | f6d91ac7539d1069c94766216a2acc1f97d4ba98 /qemu-tech.texi | |
| parent | bd7d9a6d7bed629cf8363cf8283f1d88946faddd (diff) | |
ppc: Convert Altivec register moves to TCG
Replace op_{load,store}_avr with helpers gen_{load,store}_avr.
Introduce two sets of i64 TCG variables, cpu_avr{h,l}[0..31], and
cpu_AVR{h,l}[0..2].
Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5155 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'qemu-tech.texi')
0 files changed, 0 insertions, 0 deletions