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authorMax Filippov <jcmvbkbc@gmail.com>2012-11-29 19:53:20 +0400
committerAnthony Liguori <aliguori@us.ibm.com>2012-11-29 13:00:52 -0600
commit044d003db9b6a588be2c9d0ec9de694ba3848551 (patch)
tree9583ba37329a4d46c65293e2f792294ee00f0198 /qemu-tech.texi
parente912c96f7d2e5ccd8a6352ee74f5beee2a7d9976 (diff)
qemu-tech.texi: update implemented xtensa features list
Debug option is available since QEMU-1.2; FP coprocessor and coprocessor context is available since QEMU-1.3. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'qemu-tech.texi')
-rw-r--r--qemu-tech.texi10
1 files changed, 5 insertions, 5 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi
index d73dda8e35..8aefa743a8 100644
--- a/qemu-tech.texi
+++ b/qemu-tech.texi
@@ -262,16 +262,16 @@ Current QEMU limitations:
@item Core Xtensa ISA emulation, including most options: code density,
loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
-MAC16, miscellaneous operations, boolean, multiprocessor synchronization,
+MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
+context, debug, multiprocessor synchronization,
conditional store, exceptions, relocatable vectors, unaligned exception,
interrupts (including high priority and timer), hardware alignment,
region protection, region translation, MMU, windowed registers, thread
pointer, processor ID.
-@item Not implemented options: FP coprocessor, coprocessor context,
-data/instruction cache (including cache prefetch and locking), XLMI,
-processor interface, debug. Also options not covered by the core ISA
-(e.g. FLIX, wide branches) are not implemented.
+@item Not implemented options: data/instruction cache (including cache
+prefetch and locking), XLMI, processor interface. Also options not
+covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
@item Can run most Xtensa Linux binaries.