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authorPeter Maydell <peter.maydell@linaro.org>2017-02-10 18:54:30 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-02-10 18:54:30 +0000
commit6311b19b5c650388745aafe1269489bd5afe4f2d (patch)
tree0cec19681d14040014450aa00df8337c8d125529 /qemu-option-trace.texi
parent98b2faeaee96ab084d0b1669918688d8895c155f (diff)
parentb4cc583f0285a2e1e78621dfba142f00ca47414a (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170210' into staging
target-arm queue: * aspeed: minor fixes * virt: declare fwcfg and virtio-mmio as DMA coherent in DT & ACPI * arm: enable basic TCG emulation of PMU for AArch64 # gpg: Signature made Fri 10 Feb 2017 18:06:30 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20170210: aspeed/smc: use a modulo to check segment limits aspeed/smc: handle dummies only in fast read mode aspeed: remove useless comment on controller segment size aspeed: check for negative values returned by blk_getlength() hw/arm/virt: Declare fwcfg as dma cache coherent in dt hw/arm/virt: Declare fwcfg as dma cache coherent in ACPI hw/arm/virt: Declare virtio-mmio as dma cache coherent in ACPI target-arm: Declare virtio-mmio as dma-coherent in dt target-arm: Enable vPMU support under TCG mode target-arm: Add support for PMU register PMINTENSET_EL1 target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0 target-arm: Add support for PMU register PMSELR_EL0 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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