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| author | Jia Liu <proljc@gmail.com> | 2013-08-21 09:23:10 +0800 |
|---|---|---|
| committer | Jia Liu <proljc@gmail.com> | 2013-08-21 09:23:10 +0800 |
| commit | ed396e2b2d256c1628de7c11841b509455a76c03 (patch) | |
| tree | 02910fd93a6b2ceb9d688a70375578c9bf7ae9eb /qemu-nbd.texi | |
| parent | b6d9766ddf5453e79e0c66c9348728ba44ba115f (diff) | |
hw/openrisc: Fix masking in openrisc_pic_cpu_handler()
Consider the masking of PICSR and PICMR:
((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i)))
To correctly mask bits, we should use the bitwise AND "&" rather than
the logical AND "&&". Also, the loop is not necessary for masking.
Simply use (cpu->env.picsr & cpu->env.picmr).
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
Diffstat (limited to 'qemu-nbd.texi')
0 files changed, 0 insertions, 0 deletions