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authorPeter Maydell <peter.maydell@linaro.org>2011-02-22 18:19:43 +0000
committerAurelien Jarno <aurelien@aurel32.net>2011-03-07 09:46:19 +0100
commitca27c052d992da83ce0786d81f85b87cd1f5d301 (patch)
tree4ea796f79b4bfc9b090eb6c15ed85763203fb2e2 /qemu-malloc.c
parent3849902cd852d7de0783abc41cb0c57949d567fd (diff)
target-arm: Implement a minimal set of cp14 debug registers
Newer ARM kernels try to probe for whether the CPU has hardware breakpoint support. For this to work QEMU has to implement a minimal set of the cp14 debug registers. The architecture requires v7 cores to implement debug and so there is no defined way to report its absence; however in practice returning a zero DBGDIDR (ie with a reserved value for "debug architecture version") should cause well-written hw debug users to do the right thing. We also implement DBGDRAR and DBGDSAR as RAZ, indicating no memory mapped debug components. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'qemu-malloc.c')
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