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authorPeter Maydell <peter.maydell@linaro.org>2018-03-02 10:45:40 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-02 11:03:45 +0000
commit5aff1c0744a19ceec81787f8371302d2e1fc0be1 (patch)
tree10d69d1a1e6535c33ac1196ce00e95044b75425a /qemu-io.c
parent9e5e54d1af26c4b0a4a32259a465b77db21900a0 (diff)
mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image
Define a new board model for the MPS2 with an AN505 FPGA image containing a Cortex-M33. Since the FPGA images for TrustZone cores (AN505, and the similar AN519 for Cortex-M23) have a significantly different layout of devices to the non-TrustZone images, we use a new source file rather than shoehorning them into the existing mps2.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-20-peter.maydell@linaro.org
Diffstat (limited to 'qemu-io.c')
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