diff options
| author | 陳韋任 (Wei-Ren Chen) <chenwj@iis.sinica.edu.tw> | 2012-11-21 14:04:41 +0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-11-24 13:19:54 +0100 |
| commit | 211da99290c8d570eee78f3f534f7e7d9d8f9da8 (patch) | |
| tree | ff5480a78e45b741b6649f9fbae6e56235991e82 /qemu-img.texi | |
| parent | d132c79f6b68622e8a115327d1f60176e1816c7c (diff) | |
target-mips: Clean up microMIPS32 major opcode
I check MIPS microMIPS manual [1], and found the major opcode might
be wrong. I add a comment to explicitly indicate what manual I am refering
to, and according that manual I remove microMIPS32 major opcodes 0x1f.
As for others, like 0x16, 0x17, 0x36 and 0x37, they are for higher-order
MIPS ISA level or new revision of this microMIPS architecture. Quote
from Johnson, they are belong MIPS64 [2].
[1] http://www.mips.com/products/architectures/micromips/#specifications
MIPS Architecture for Programmers Volume II-B:
The microMIPS32 Instruction Set (Revision 3.05)
MD00582-2B-microMIPS-AFP-03.05.pdf
[2] http://www.mips.com/products/architectures/mips64/
MIPS Architecture For Programmers
Volume II-A: The MIPS64 Instruction Set
MD00087-2B-MIPS64BIS-AFP-03.51.pdf
Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'qemu-img.texi')
0 files changed, 0 insertions, 0 deletions