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authorEric Auger <eric.auger@redhat.com>2018-05-04 18:05:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-05-04 18:05:51 +0100
commitcac994ef43b128c80c56b4cd4dd9d8af0f95da3f (patch)
treedd5dc9512885fed02e12a4d50ccdaa451937f4f2 /qemu-img-cmds.hx
parent527773eeef9f2225370f9c17c35074b2ed0ced92 (diff)
hw/arm/smmu-common: IOMMU memory region and address space setup
We set up the infrastructure to enumerate all the PCI devices attached to the SMMU and create an associated IOMMU memory region and address space. Those info are stored in SMMUDevice objects. The devices are grouped according to the PCIBus they belong to. A hash table indexed by the PCIBus pointer is used. Also an array indexed by the bus number allows to find the list of SMMUDevices. Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Prem Mallappa <prem.mallappa@broadcom.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1524665762-31355-3-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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