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authorLeon Alrae <leon.alrae@imgtec.com>2016-03-15 09:59:30 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2016-03-30 09:13:59 +0100
commit1f93a6e4f3f4da3c2ce4be1d300dcfe3e6dd0e77 (patch)
tree84d623e36c0185d4fa1d437e02ed75ec066b198a /qemu-bridge-helper.c
parenta9bd9b5a8682c8129b46ae0e673efdad35f493c2 (diff)
hw/mips: add initial Cluster Power Controller support
Cluster Power Controller (CPC) is responsible for power management in multiprocessing system. It provides registers to control the power and the clock frequency of the individual elements in the system. This patch implements only three registers that are used to control the power state of each VP on a single core: * VP Run is a write-only register used to set each VP to the run state * VP Stop is a write-only register used to set each VP to the suspend state * VP Running is a read-only register indicating the run state of each VP Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'qemu-bridge-helper.c')
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