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authorPeter Maydell <peter.maydell@linaro.org>2018-02-15 18:29:37 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-02-15 18:29:49 +0000
commitae7c5c855b71f2de23dbad3b97bbe1c0375d6fd3 (patch)
tree474d9749c0c2ac3f00373be10c77212e54bc29d4 /qapi/net.json
parente8ab26c48475e746d0aa0c4da2128c626dc00c0a (diff)
hw/intc/armv7m_nvic: Implement v8M CPPWR register
The Coprocessor Power Control Register (CPPWR) is new in v8M. It allows software to control whether coprocessors are allowed to power down and lose their state. QEMU doesn't have any notion of power control, so we choose the IMPDEF option of making the whole register RAZ/WI (indicating that no coprocessors can ever power down and lose state). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180209165810.6668-5-peter.maydell@linaro.org
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