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author | Alex Bennée <alex.bennee@linaro.org> | 2016-12-02 17:34:54 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-12-05 17:52:01 +0000 |
commit | 5460da501a57cd72eda6fec736d76539122e2f99 (patch) | |
tree | b521fd839b2458fcb8e255475f4e23a276fed4a9 /qapi/block-core.json | |
parent | bc66cedb4141fb7588f2462c74310d8fb5dd4cf1 (diff) |
target-arm/translate-a64: fix gen_load_exclusive
While testing rth's latest TCG patches with risu I found ldaxp was
broken. Investigating further I found it was broken by 1dd089d0 when
the cmpxchg atomic work was merged. As part of that change the code
attempted to be clever by doing a single 64 bit load and then shuffle
the data around to set the two 32 bit registers.
As I couldn't quite follow the endian magic I've simply partially
reverted the change to the original code gen_load_exclusive code. This
doesn't affect the cmpxchg functionality as that is all done on in
gen_store_exclusive part which is untouched.
I've also restored the comment that was removed (with a slight tweak
to mention cmpxchg).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <rth@twiddle.net>
Message-id: 20161202173454.19179-1-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'qapi/block-core.json')
0 files changed, 0 insertions, 0 deletions