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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-07-20 10:32:55 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2011-07-26 14:30:54 +0000 |
| commit | 906879a98fa31232f494fece3c5cb3c2baaf8c3c (patch) | |
| tree | 40d311303266cc8e8004b69c6f81d2766bab59bb /qapi-schema-guest.json | |
| parent | 7807eed932dbb88fa320ddba99bff45ba96319c6 (diff) | |
target-arm: Mark 1136r1 as a v6K core
The 1136r1 is actually a v6K core (unlike the 1136r0); mark it as such,
thus enabling the TLS registers, NOP hints, CLREX, half and byte wide
exclusive load/stores, etc.
The VA-to-PA translation registers are not present on 1136r1, so
introduce a new feature flag for them, which is enabled on 1176,
11MPCore and all v7 cores.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Diffstat (limited to 'qapi-schema-guest.json')
0 files changed, 0 insertions, 0 deletions