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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-04-30 12:41:53 +0200
committerMichael Tokarev <mjt@tls.msk.ru>2024-05-04 09:37:20 +0300
commitdc5390a0ca23e3811f793fe15b40ba2a47c4729b (patch)
treefcb18ccfff9495657f105448d4e863eba512f240 /python
parent7b4804c965643d30ad0aed8cafe9b762381cfeb5 (diff)
target/sh4: Fix ADDV opcode
The documentation says: ADDV Rm, Rn Rn + Rm -> Rn, overflow -> T But QEMU implementation was: ADDV Rm, Rn Rn + Rm -> Rm, overflow -> T Fix by filling the correct Rm register. Add tests provided by Paul Cercueil. Cc: qemu-stable@nongnu.org Fixes: ad8d25a11f ("target-sh4: implement addv and subv using TCG") Reported-by: Paul Cercueil <paul@crapouillou.net> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2317 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20240430163125.77430-2-philmd@linaro.org> (cherry picked from commit c365e6b0705788866a65e7b8206bd4c5332595cd) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions