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authorAlex Bennée <alex.bennee@linaro.org>2018-03-01 11:05:54 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-01 11:13:59 +0000
commit931931904cb56b9310a1a9c7f88adfce7d9bd82b (patch)
tree35b16f5739dc5f2fecb2b46217a17821ba9a7295 /po
parent7d4dd1a73a023f75c893623710e43743501b318e (diff)
arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
I've re-factored the handle_simd_intfp_conv helper to properly handle half-precision as well as call plain conversion helpers when we are not doing fixed point conversion. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180227143852.11175-21-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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