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authorAlex Bennée <alex.bennee@linaro.org>2018-07-19 16:42:48 +0100
committerRichard Henderson <richard.henderson@linaro.org>2018-07-19 09:07:31 -0700
commite65a5f227d77a5dbae7a7123c3ee915ee4bd80cf (patch)
treefb7d6cd6c6e919299e7c3ab0521cc13fa64530bf /po
parente1ea55668ffe6ce558a063f3a9621b761738e1f2 (diff)
tcg/aarch64: limit mul_vec size
In AdvSIMD we can only do 32x32 integer multiples although SVE is capable of larger 64 bit multiples. As a result we can end up generating invalid opcodes. Fix this by only reprting we can emit mul vector ops if the size is small enough. Fixes a crash on: sve-all-short-v8.3+sve@vq3/insn_mul_z_zi___INC.risu.bin When running on AArch64 hardware. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20180719154248.29669-1-alex.bennee@linaro.org> [rth: Removed the tcg_debug_assert -- there are plenty of other cases that we do not diagnose within the insn encoding helpers.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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