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authorMax Filippov <jcmvbkbc@gmail.com>2019-01-23 19:26:52 -0800
committerMax Filippov <jcmvbkbc@gmail.com>2019-01-24 10:44:26 -0800
commitfa92bd4af71bed76bf57bb1c8b5465414a52ab3f (patch)
tree3beaed635eff3b55e6d6809aa579547c748e68af /pc-bios
parentfff7bf145045ec57be6bd3bdd69de7930137654c (diff)
target/xtensa: fix access to the INTERRUPT SR
INTERRUPT special register may be changed both by the core (by writing to INTSET and INTCLEAR registers) and by external events (by triggering and clearing HW IRQs). In MTTCG this state must be protected from concurrent access, otherwise interrupts may be lost or spurious interrupts may be detected. Use atomic operations to change INTSET SR. Fix wsr.intset so that it soesn't clear any bits. Fix wsr.intclear so that it doesn't clear bit that corresponds to NMI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'pc-bios')
0 files changed, 0 insertions, 0 deletions