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authorMarcelo Tosatti <mtosatti@redhat.com>2014-04-30 13:48:45 -0300
committerAndreas Färber <afaerber@suse.de>2014-06-25 23:54:57 +0200
commit303752a9068bfe84b9b05f1cd5ad5ff65b7f3ea6 (patch)
tree52d8eb601fac0ce8ac1ab6ad644b6290a64c722a /pc-bios/Makefile
parent68bfd0ad4a1dcc4c328d5db85dc746b49c1ec07e (diff)
target-i386: Support "invariant tsc" flag
Expose "Invariant TSC" flag, if KVM is enabled. From Intel documentation: 17.13.1 Invariant TSC The time stamp counter in newer processors may support an enhancement, referred to as invariant TSC. Processor’s support for invariant TSC is indicated by CPUID.80000007H:EDX[8]. The invariant TSC will run at a constant rate in all ACPI P-, C-. and T-states. This is the architectural behavior moving forward. On processors with invariant TSC support, the OS may use the TSC for wall clock timer services (instead of ACPI or HPET timers). TSC reads are much more efficient and do not incur the overhead associated with a ring transition or access to a platform resource. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> [ehabkost: redo feature filtering to use .tcg_features] [ehabkost: add CPUID_APM_INVTSC macro, add it to .unmigratable_flags] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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