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authorPeter Maydell <peter.maydell@linaro.org>2013-05-23 12:59:55 +0100
committerBlue Swirl <blauwirbel@gmail.com>2013-05-26 10:04:54 +0000
commit39d5492a186d156d4acc306ae258d7e04f8a6c29 (patch)
treefa968b2dae88179ae1d4d808d9387a3c318db099 /os-win32.c
parentfd469df97ab4277411ecdd4032a2f045a3a87b2a (diff)
target-arm: Don't use TCGv when we mean TCGv_i32
TCGv changes size depending on the compile time value of TARGET_LONG_BITS. This is useful for generating code for MIPS style "instructions are the same but the register width changes" CPUs, and also for the generic bits of QEMU which operate on "width of a virtual address" values, but mostly in the ARM target code we were using it purely as a shorthand for "any 32 bit value". This needs to change in preparation for AArch64 support, since an AArch64-capable v8 core will have 64 bit virtual addresses but still use 32 bit values for the 32 bit instruction set. This patch mechanically converts all the occurrences of TCGv, tcg_temp_new(), tcg_temp_free(), tcg_temp_local_new() and TCGV_UNUSED() to their explicitly 32 bit counterparts. This is correct for everything except the arguments to tcg_gen_qemu_{ld,st}*, which really do need to be TCGv and so will require a 32-to-64 conversion when building the 32 bit code for AArch64. Those changes will be in a separate patch for easier review. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'os-win32.c')
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