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authorPeter Maydell <peter.maydell@linaro.org>2018-08-16 19:02:21 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-08-16 19:02:21 +0100
commitb8f7ff1e10b4d03555d6a5da011c2aae10063ab8 (patch)
treecbd691dccf09a4dad1d35938d3e70efd385a8dc8 /numa.c
parentbb16c0412a572c2c9cd44496deb3ad430bc49c1a (diff)
parent8639c5c95472ee79391a7e7826d1af23948b71f6 (diff)
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-aug-2018' into staging
MIPS queue Aug 16, 2018 # gpg: Signature made Thu 16 Aug 2018 18:19:36 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-aug-2018: qemu-doc: Amend MIPS-related items linux-user: Add preprocessor availability control to some syscalls linux-user: Update MIPS syscall numbers up to kernel 4.18 headers elf: Add ELF flags for MIPS machine variants elf: Remove duplicate preprocessor constant definition target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0 target/mips: Don't update BadVAddr register in Debug Mode target/mips: Implement CP0 Config1.WR bit functionality target/mips: Add CP0 BadInstrX register target/mips: Update some CP0 registers bit definitions target/mips: Fix two instances of shadow variables target/mips: Mark switch fallthroughs with interpretable comments target/mips: Avoid case statements formulated by ranges - part 2 target/mips: Avoid case statements formulated by ranges - part 1 MAINTAINERS: Update target/mips maintainer's email addresses Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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