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author | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:56 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:44:45 +0000 |
commit | f5bd261a61b8d30bb6ead9dce2125576d3bdc626 (patch) | |
tree | 5af3be3ce1369260a654f60fa86bd1bb26a10919 /nbd | |
parent | 46932cf26eae239193c465e08234c41d9df7d3d8 (diff) |
target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC)
Mark up the cpreginfo structs to indicate offsets for system
registers from VNCR_EL2, as defined in table D8-66 in rule R_CSRPQ in
the Arm ARM. This covers all the remaining offsets at 0x200 and
above, except for the GIC ICH_* registers.
(Note that because we don't implement FEAT_SPE, FEAT_TRF,
FEAT_MPAM, FEAT_BRBE or FEAT_AMUv1p1 we don't implement any
of the registers that use offsets at 0x800 and above.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'nbd')
0 files changed, 0 insertions, 0 deletions