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| author | Alistair Francis <alistair.francis@xilinx.com> | 2016-07-04 13:06:37 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-07-04 13:15:22 +0100 |
| commit | 034c2e69023007ac855a86ab5d91591f70506a62 (patch) | |
| tree | c3a2dafa498b026612c69d148599e66cd54a3c3f /main-loop.c | |
| parent | a74229597e2c226a1a1f46a8926a0d2ec9c7574e (diff) | |
dma: Add Xilinx Zynq devcfg device model
Add a minimal model for the devcfg device which is part of Zynq.
This model supports DMA capabilities and interrupt generation.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 83df49d8fa2d203a421ca71620809e4b04754e65.1467053537.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'main-loop.c')
0 files changed, 0 insertions, 0 deletions