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authorRichard Henderson <richard.henderson@linaro.org>2022-06-01 18:33:51 -0700
committerLaurent Vivier <laurent@vivier.eu>2022-06-02 09:35:02 +0200
commit710d747b2deaf5f5678aebb1fabbe00224e5cdde (patch)
tree2b28cf307c1f545efb777dab8c7c1cfba12eab52 /linux-user
parentad5a5cf97d80501be95f5d255d2ce133e0623b50 (diff)
target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0
According to the M68040 Users Manual, section 8.4.3, Six word stack frame (format 2), Zero Div (and others) is supposed to record the next insn in PC and the address of the trapping instruction in ADDRESS. While the N, Z and V flags are documented to be undefine on DIV0, the C flag is documented as always cleared. Update helper_div* to take the instruction length as an argument and use raise_exception_format2. Hoist the reset of the C flag above the division by zero check. Update m68k_interrupt_all to pass mmu.ar to do_stack_frame. Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the kernel does in trap_c(). Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220602013401.303699-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user')
-rw-r--r--linux-user/m68k/cpu_loop.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c
index e24d17e180..6598bce3c4 100644
--- a/linux-user/m68k/cpu_loop.c
+++ b/linux-user/m68k/cpu_loop.c
@@ -50,7 +50,7 @@ void cpu_loop(CPUM68KState *env)
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar);
break;
case EXCP_DIV0:
- force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc);
+ force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->mmu.ar);
break;
case EXCP_TRAP0:
{