diff options
author | Michael Clark <mjc@sifive.com> | 2018-03-03 01:31:11 +1300 |
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committer | Michael Clark <mjc@sifive.com> | 2018-03-07 08:30:28 +1300 |
commit | 47ae93cdfedc683c56e19113d516d7ce4971c8e6 (patch) | |
tree | 713240f8392d981ec9b11893d603475f7a5dcfa5 /linux-user/riscv/target_cpu.h | |
parent | 65c5b75c38b3e56650fc63674039108697096f75 (diff) |
RISC-V Linux User Emulation
Implementation of linux user emulation for RISC-V.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'linux-user/riscv/target_cpu.h')
-rw-r--r-- | linux-user/riscv/target_cpu.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h new file mode 100644 index 0000000000..c5549b1120 --- /dev/null +++ b/linux-user/riscv/target_cpu.h @@ -0,0 +1,18 @@ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +{ + if (newsp) { + env->gpr[xSP] = newsp; + } + + env->gpr[xA0] = 0; +} + +static inline void cpu_set_tls(CPURISCVState *env, target_ulong newtls) +{ + env->gpr[xTP] = newtls; +} + +#endif |