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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-16 12:29:00 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-14 17:13:53 +0100
commit7a47bae586865498ac55531141d9c3d4d9e3ff83 (patch)
treeb592d1772291b43238fa4b5ba5e65ce73eb46bb8 /linux-user/mips
parentbbd5e4a27f0e4e717f9bdf35fd9c1f42410dea04 (diff)
target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
The MIPS ISA release 2 is common to 32/64-bit CPUs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
Diffstat (limited to 'linux-user/mips')
-rw-r--r--linux-user/mips/cpu_loop.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index e400166c58..748e1c664f 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -384,7 +384,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
prog_req.frdefault &= interp_req.frdefault;
prog_req.fre &= interp_req.fre;
- bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS32R2 ||
+ bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS_R2 ||
env->insn_flags & ISA_MIPS32R6;
if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) {