diff options
| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-06-28 12:43:38 +0200 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2019-07-02 16:56:46 +0200 |
| commit | 64ce541c0bde7f8bcf8b39a08c32e71ceab23268 (patch) | |
| tree | 49405c89d857aa927d57472336e2fa0bc51ad9c4 /linux-user/mips | |
| parent | 1272a6c4883db77e08a9cff1d2d3d1fa1f420865 (diff) | |
linux-user: Handle EXCP_FPE properly for MIPS
Handle EXCP_FPE properly for MIPS in cpu loop.
Note that a vast majority of FP instructions are not affected by
the absence of the code in this patch, as they use alternative code
paths for handling floating point exceptions (see, for example,
invocations of update_fcr31()) - they rely on softfloat library for
keeping track on exceptions that needs to be raised. However, there
are few MIPS FP instructions (an example is CTC1) that use function
do_raise_exception() directly, and they need the case that is added
in this patch to propagate the FPE exception as designed.
The code is based on kernel's function force_fcr31_sig() in
arch/mips/kernel.traps.c.
Reported-by: Yunqiang Su <ysu@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <1561718618-20218-6-git-send-email-aleksandar.markovic@rt-rk.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user/mips')
| -rw-r--r-- | linux-user/mips/cpu_loop.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 43ba267547..0ba894fa7a 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -540,6 +540,23 @@ done_syscall: info.si_code = TARGET_ILL_ILLOPC; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; + case EXCP_FPE: + info.si_signo = TARGET_SIGFPE; + info.si_errno = 0; + info.si_code = TARGET_FPE_FLTUNK; + if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) { + info.si_code = TARGET_FPE_FLTINV; + } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_DIV0) { + info.si_code = TARGET_FPE_FLTDIV; + } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_OVERFLOW) { + info.si_code = TARGET_FPE_FLTOVF; + } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_UNDERFLOW) { + info.si_code = TARGET_FPE_FLTUND; + } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INEXACT) { + info.si_code = TARGET_FPE_FLTRES; + } + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + break; /* The code below was inspired by the MIPS Linux kernel trap * handling code in arch/mips/kernel/traps.c. */ |