diff options
author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-08 13:36:46 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-08 13:36:46 +0000 |
commit | 48733d195b10a61a18c0aafcdd0ae711bdfe03a6 (patch) | |
tree | 0ec94b143eb719c00a3157fc5be1ec9f7e73e724 /linux-user/main.c | |
parent | e69b406510a7267b79d4ba7e8a1c8d4b28af2fb1 (diff) |
CRIS Linux userland emulation, part 2. By Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3367 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'linux-user/main.c')
-rw-r--r-- | linux-user/main.c | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/linux-user/main.c b/linux-user/main.c index fd130ef9cc..b4bc93da5f 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -1601,6 +1601,61 @@ void cpu_loop (CPUState *env) } #endif +#ifdef TARGET_CRIS +void cpu_loop (CPUState *env) +{ + int trapnr, ret; + target_siginfo_t info; + + while (1) { + trapnr = cpu_cris_exec (env); + switch (trapnr) { + case 0xaa: + { + info.si_signo = SIGSEGV; + info.si_errno = 0; + /* XXX: check env->error_code */ + info.si_code = TARGET_SEGV_MAPERR; + info._sifields._sigfault._addr = env->debug1; + queue_signal(info.si_signo, &info); + } + break; + case EXCP_BREAK: + ret = do_syscall(env, + env->regs[9], + env->regs[10], + env->regs[11], + env->regs[12], + env->regs[13], + env->pregs[7], + env->pregs[11]); + env->regs[10] = ret; + env->pc += 2; + break; + case EXCP_DEBUG: + { + int sig; + + sig = gdb_handlesig (env, TARGET_SIGTRAP); + if (sig) + { + info.si_signo = sig; + info.si_errno = 0; + info.si_code = TARGET_TRAP_BRKPT; + queue_signal(info.si_signo, &info); + } + } + break; + default: + printf ("Unhandled trap: 0x%x\n", trapnr); + cpu_dump_state(env, stderr, fprintf, 0); + exit (1); + } + process_pending_signals (env); + } +} +#endif + #ifdef TARGET_M68K void cpu_loop(CPUM68KState *env) @@ -2195,6 +2250,26 @@ int main(int argc, char **argv) env->pc = regs->pc; env->unique = regs->unique; } +#elif defined(TARGET_CRIS) + { + env->regs[0] = regs->r0; + env->regs[1] = regs->r1; + env->regs[2] = regs->r2; + env->regs[3] = regs->r3; + env->regs[4] = regs->r4; + env->regs[5] = regs->r5; + env->regs[6] = regs->r6; + env->regs[7] = regs->r7; + env->regs[8] = regs->r8; + env->regs[9] = regs->r9; + env->regs[10] = regs->r10; + env->regs[11] = regs->r11; + env->regs[12] = regs->r12; + env->regs[13] = regs->r13; + env->regs[14] = info->start_stack; + env->regs[15] = regs->acr; + env->pc = regs->erp; + } #else #error unsupported target CPU #endif |