diff options
author | Nathan Egge <negge@xiph.org> | 2023-08-03 09:14:24 -0400 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-08-06 10:10:11 -0700 |
commit | 4333f0924c2f2ca8efaebaed8c24f55f77d8b013 (patch) | |
tree | aa9c78b0e2a7c604ca42fe552568e665607e55a0 /linux-user/elfload.c | |
parent | 89e5b7935e92af6f3b4e4cdb19dfddef4e9dde36 (diff) |
linux-user/elfload: Set V in ELF_HWCAP for RISC-V
Set V bit for hwcap if misa is set.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1793
Signed-off-by: Nathan Egge <negge@xiph.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230803131424.40744-1-negge@xiph.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/elfload.c')
-rw-r--r-- | linux-user/elfload.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 861ec07abc..a299ba7300 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1710,7 +1710,8 @@ static uint32_t get_elf_hwcap(void) #define MISA_BIT(EXT) (1 << (EXT - 'A')) RISCVCPU *cpu = RISCV_CPU(thread_cpu); uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A') - | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C'); + | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C') + | MISA_BIT('V'); return cpu->env.misa_ext & mask; #undef MISA_BIT |