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authorTong Ho <tong.ho@xilinx.com>2021-09-16 22:23:52 -0700
committerPeter Maydell <peter.maydell@linaro.org>2021-09-30 13:42:09 +0100
commit68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f (patch)
treeb597e6df805b6556f21d30a36a4039a521298ee3 /iothread.c
parent9fcd15b9193e819b6cc2fd0a45e3506148812bb4 (diff)
hw/nvram: Introduce Xilinx eFuse QOM
This introduces the QOM for Xilinx eFuse, an one-time field-programmable storage bit array. The actual mmio interface to the array varies by device families and will be provided in different change-sets. Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-2-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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