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authorAurelien Jarno <aurelien@aurel32.net>2013-09-03 08:27:38 +0200
committerRichard Henderson <rth@twiddle.net>2014-02-17 10:12:28 -0600
commite46b225a3137e62c975c49aaae7bb5f9583cc428 (patch)
treeaba700db46bf9759e561945e7b4b753c27db4e80 /iohandler.c
parent7a3a00979d9dfe2aaa66ce5fc68cd161b4f900ba (diff)
tcg/optimize: fix known-zero bits for right shift ops
32-bit versions of sar and shr ops should not propagate known-zero bits from the unused 32 high bits. For sar it could even lead to wrong code being generated. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'iohandler.c')
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