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authorRichard Henderson <richard.henderson@linaro.org>2024-07-23 15:19:39 +1000
committerRichard Henderson <richard.henderson@linaro.org>2024-07-23 15:19:39 +1000
commit71bce0e1fb1a866dde4a4b6016fc18b09f317338 (patch)
tree4d9494498fc60760c1edabea2c021dc09897f150 /include
parent6af69d02706c821797802cfd56acdac13a7c9422 (diff)
parent3f57638a7eae5b56f65224c680654a2aaaa09379 (diff)
Merge tag 'pull-tcg-20240723' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Export set/clear_helper_retaddr target/arm: Use set_helper_retaddr for dc_zva, sve and sme target/ppc: Tidy dcbz helpers target/ppc: Use set_helper_retaddr for dcbz target/s390x: Use set_helper_retaddr in mem_helper.c # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmafJKIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+FBAf7Bup+karxeGHZx2rN # cPeF248bcCWTxBWHK7dsYze4KqzsrlNIJlPeOKErU2bbbRDZGhOp1/N95WVz+P8V # 6Ny63WTsAYkaFWKxE6Jf0FWJlGw92btk75pTV2x/TNZixg7jg0vzVaYkk0lTYc5T # m5e4WycYEbzYm0uodxI09i+wFvpd+7WCnl6xWtlJPWZENukvJ36Ss43egFMDtuMk # vTJuBkS9wpwZ9MSi6EY6M+Raieg8bfaotInZeDvE/yRPNi7CwrA7Dgyc1y626uBA # joGkYRLzhRgvT19kB3bvFZi1AXa0Pxr+j0xJqwspP239Gq5qezlS5Bv/DrHdmGHA # jaqSwg== # =XgUE # -----END PGP SIGNATURE----- # gpg: Signature made Tue 23 Jul 2024 01:33:54 PM AEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20240723' of https://gitlab.com/rth7680/qemu: target/riscv: Simplify probing in vext_ldff target/s390x: Use set/clear_helper_retaddr in mem_helper.c target/s390x: Use user_or_likely in access_memmove target/s390x: Use user_or_likely in do_access_memset target/ppc: Improve helper_dcbz for user-only target/ppc: Merge helper_{dcbz,dcbzep} target/ppc: Split out helper_dbczl for 970 target/ppc: Hoist dcbz_size out of dcbz_common target/ppc/mem_helper.c: Remove a conditional from dcbz_common() target/arm: Use set/clear_helper_retaddr in SVE and SME helpers target/arm: Use set/clear_helper_retaddr in helper-a64.c accel/tcg: Move {set,clear}_helper_retaddr to cpu_ldst.h Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/exec/cpu_ldst.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 71009f84f5..dac12bd8eb 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -379,4 +379,38 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
MMUAccessType access_type, int mmu_idx);
#endif
+/*
+ * For user-only, helpers that use guest to host address translation
+ * must protect the actual host memory access by recording 'retaddr'
+ * for the signal handler. This is required for a race condition in
+ * which another thread unmaps the page between a probe and the
+ * actual access.
+ */
+#ifdef CONFIG_USER_ONLY
+extern __thread uintptr_t helper_retaddr;
+
+static inline void set_helper_retaddr(uintptr_t ra)
+{
+ helper_retaddr = ra;
+ /*
+ * Ensure that this write is visible to the SIGSEGV handler that
+ * may be invoked due to a subsequent invalid memory operation.
+ */
+ signal_barrier();
+}
+
+static inline void clear_helper_retaddr(void)
+{
+ /*
+ * Ensure that previous memory operations have succeeded before
+ * removing the data visible to the signal handler.
+ */
+ signal_barrier();
+ helper_retaddr = 0;
+}
+#else
+#define set_helper_retaddr(ra) do { } while (0)
+#define clear_helper_retaddr() do { } while (0)
+#endif
+
#endif /* CPU_LDST_H */